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Category: hardware

Hardware – Equalization and Pre-emphasis

Hardware – Equalization and Pre-emphasis

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Before we look at equalization and pre-emphasis, we should examine some fundamentals of waves and signals. A perfect square wave is a really useful way of representing a waveform in the time-domain, but it’s not the only way of looking at the signal.The name ‘time-domain’ may be new but the view is familiar to us all, you have amplitude on the vertical axis and time you have time on the horizontal scale. Ideal square waves need infinite bandwidth The square wave…

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Hardware – Comparing 10G SFP+ with XFP

Hardware – Comparing 10G SFP+ with XFP

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In the last post I discussed clock and data recovery (CDR). This post examines an application of re-timers (or CDRs) within XFP and SFP+ transceivers. I’ve previously covered the size, power and connector differences of 10G transceivers before, but this post will focus on the differences between XFP and SFP+ and how they connect to the ASIC. Take a look at the XFP block digram below which shows the XFI electrical interface from an XFP module connecting to the the host device (ASIC…

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Hardware – Clock and Data Recovery

Hardware – Clock and Data Recovery

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Clock and data recovery is an essential physical-layer function of modern switch and router hardware. Digging deep into the electronics of a router may not be your thing, but clock recovery is a fundamental building block for other network hardware functions. For example, serial to parallel data conversions require reliable clock and data recovery (CDR) to function effectively. It’s hard to understand serial to parallel conversions or signal conditioning without learning about CDR first.

Build a 48-port switch using a 24-port ASIC

Build a 48-port switch using a 24-port ASIC

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Modern top-of-rack switches (or TORs) run at line rate and are non-oversubscribed. This means you get non-blocking [1] port-to-port throughput within the switch ASIC at the line rate of the front panel ports. Almost all TOR switches use a single switch ASIC and the industry demanded port-density on a single ASIC, and the manufacturers delivered. The list below shows the 10Gbps port density evolution of the Broadcom StrataXGS product line. The Intel Fulcrum ASIC evolution isn’t shown here but looks very similar….

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Hardware – How eye pattern diagrams work

Hardware – How eye pattern diagrams work

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Over the years I’ve seen the eye pattern diagram a few times. At first I don’t understand it and I get an instructor or peer to explain it. I briefly understand, then moments later… it’s gone. If you grok how this diagram is built straight away then please forgive me. Otherwise please read on. The eye pattern diagram is named after the eye shape in the middle of the diagram above. The purpose of the diagram is to measure the…

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Hardware – Signals, Traces and Circuit Boards

Hardware – Signals, Traces and Circuit Boards

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We commonly interconnect network devices over distances of 100 meters for Cat5 Ethernet or maybe 300 meters over OM3 multimode fiber for 10GBASE-SR. With enough money we can extend the span between devices to perhaps 10Km for with 10GBASE-LR), 40Km for 10GBase-ER or even 80Km for 10GBase-ZR. Why then, when we move to the world of circuit boards, do we have to suffer maximum distances which are measured in hundreds of millimeters? Let’s explore why life is so hard for…

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Hardware – XOR

Hardware – XOR

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Warning this blog post contains a tiny bit of boolean logic. Don’t be afraid.  Let’s explore the eXclusive-OR  (XOR) logic function, another hidden gem that powers computer and network systems. XOR is a binary logical operation with some very special properties. You’ll find XOR hiding under the covers of most communications systems.  The goal of this post is to tell you why XOR is so special and so heavily used.

Hardware – Differential Signaling

Hardware – Differential Signaling

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I’m planning a series of blog posts that delve deeper into the way networking hardware works. This started with an idea for a single blog post on PHY-chips but I found that there were too many fundamental concepts that I was ‘assuming’ were already known. I’m not an electronics expert, but I hope that I can explain just enough fundamentals to help explain the bigger picture. The first topic I want to cover is called differential signaling. Differential signaling is…

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A quick fix for a bad switch port

A quick fix for a bad switch port

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This post is a short one, but hopefully still valuable. I spent 30 minutes troubleshooting a flapping switch port in the lab this week. I was attaching a headless test device to a 3750G and I couldn’t see the status of the NIC from the tester’s perspective. So one crash cart and a bit of port-swapping later, I found the problem. It was a dodgy switch port and swapping to another port (with identicial config) solved the issue. Then it…

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Test – Throughput alchemy using a snake topology

Test – Throughput alchemy using a snake topology

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Sometimes it’s best not to trust network vendor datasheets.  Nothing quite beats a controlled test of a network device in your lab with your config and your required features. But if you want to load test multiple ports on your 10G device-under-test (or DUT), then things can get very expensive, very fast. In this post I’ll show a test topology that will help you turn 10Gbps of test traffic into 640Gbps or more.