Programmable ASICs
I love learning about network hardware, but I’ve always found it difficult to get detailed information on ASICS. We had a great presentation from Dave Zacks on the Cisco 3850 programmable ASIC at the Cisco Live Europe Tech Field Day event.
This is rapid-fire presentation, but if you want a longer and more comprehensive version you can check out the CiscoLive Breakout Session BRKARC3467 “Cisco Enterprise ASICS” by Dave & Peter Jones. There were three main points in the presentation that stood out for me:
Yield Improvements – As the process shrinks, so does the ASIC. This reduces the likelihood of any given chip hitting impurities in the die. Although complexity and cost is increasing, the yield per die is increasing at a greater rate. This is driving ongoing investments in ever-smaller processes.
Quantum Tunnelling – A silicon atom is about 0.2 nanometers. As process sizes shrink we’re getting close the point where individual atoms are hard to contain. From talking to Dave after the presentation, it seems that future improvements will come from stacking ASICs similar to the process used in 3D NAND
Programmable ASIC – Learning about pipelines, recirculation and encapsulation is really important for a network designer. The 3850 ASIC can be reconfigured to handle different flavours of encapsulation, which is very important in terms of hardware support for a given encapsulation feature. As Peter pointed out, pretty much every networking innovation in recent years requires data-plane encapsulation and table lookups. Traditionally you’d need to include an expensive and power hungry FPGA to gain this type of flexibility.
Sherpa Summary
ASIC designers work within a fixed transistor budget and every feature supported in the ASIC comes at the cost of something else. The programmable ASIC is a really cool innovation which greatly reduces the need to make these tradeoffs, but doesn’t eliminate them entirely.
If you’re a network engineer seeking hardware-supported features you’ll benefit from an understanding of the ASIC design process and the capabilities of ASIC you’re buying. Take some time to watch the presentation, you’ll enjoy it.