Hardware – Comparing 10G SFP+ with XFP


By Adamantios (Own work) [GFDL (http://www.gnu.org/copyleft/fdl.html), CC-BY-SA-3.0 (http://creativecommons.org/licenses/by-sa/3.0/)

In the last post I discussed clock and data recovery (CDR). This post examines an application of re-timers (or CDRs) within XFP and SFP+ transceivers. I’ve previously covered the size, power and connector differences of 10G transceivers before, but this post will focus on the differences between XFP and SFP+ and how they connect to the ASIC.

Take a look at the XFP block digram below which shows the XFI electrical interface from an XFP module connecting to the the host device (ASIC or PHY chip) on left. The test-points (arrows marked A,B,B’,C,C’ & D) aren’t part of the physical interface but are markers that we can use to discuss the diagram. The four boxes on the right represent transmit and receive sub-assemblies, drivers and amps. You’ll find similar functional blocks in all optical transceivers.

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Hardware – Signals, Traces and Circuit Boards

Image courtesy of wikipedia

We commonly interconnect network devices over distances of 100 meters for Cat5 Ethernet or maybe 300 meters over OM3 multimode fiber for 10GBASE-SR. With enough money we can extend the span between devices to perhaps 10Km for with 10GBASE-LR), 40Km for 10GBase-ER or even 80Km for 10GBase-ZR.

Why then, when we move to the world of circuit boards, do we have to suffer maximum distances which are measured in hundreds of millimeters? Let’s explore why life is so hard for the high-speed signals which transit the circuit board.  Continue reading